The invention relates to techniques for lessening wafer slip and scratching in semiconductor processing chambers.
In many semiconductor device manufacturing processes, the required high levels of device performance, yield and process repeatability can only be achieved if the substrate (e.g., a semiconductor wafer) is not subject to large stresses during processing.
For example, consider rapid thermal processing (RTP), which is used for several different fabrication processes, including rapid thermal annealing (RTA), rapid thermal cleaning (RTC), rapid thermal chemical vapor deposition (RTCVD), rapid thermal oxidation (RTO), and rapid thermal nitridation (RTN).
There is a trend in these processes to increase substrate size so as to increase the number of devices which can be fabricated simultaneously. One type of large substrate for which processing techniques are currently being developed is a 300 millimeter (mm) diameter circular silicon (Si) wafer. The next generations of such wafers may be even larger, having diameters of 350 mm, 400 mm or even more. Of course, rectangular wafers are also used in some systems. If substrate thickness is constant, the mass of the substrate is proportional to the square of its radius or edge length. In susceptor systems, the substrate is supported by being placed on a susceptor support. Thus, the amount of support is proportional to the surface area of the substrate.
In susceptorless systems, the substrate is usually only mechanically supported around its perimeter. The amount of support in this type of system is only proportional to the diameter of the substrate (the edge length for a rectangular substrate), not the area as in a susceptor system. In these systems, as substrates get larger, they tend to sag where they are not supported, i.e., in areas away from the perimeter support.
In particular, gravity causes stress in the substrate. This gravitational stress results in a strain which is evidenced by sagging. Strain can damage the substrate by causing wafer slip in the silicon crystal. This wafer slip will usually destroy devices through which they pass.
Another potential cause of stress are radial temperature gradients. These occur when the center of the substrate is at a different temperature than the edge. Such radial temperature gradients typically occur when the substrate is heated or cooled rapidly, as the rate of heat loss is usually different at the center than at the edge. Thus, radial temperature gradients occur most frequently in rapid thermal processes.
Both causes of stress, gravity and radial temperature gradients, affect the maximum temperature to which a substrate may be brought without wafer slippage. For example, consider a large wafer that is perfectly conductive and thus has no radial temperature gradients. If this wafer is only supported around its perimeter, and is thus subject to substantial gravitational stress, the wafer's maximum processing temperature is lower than if no gravitational stress is present. Similarly, if a small wafer, otherwise not subject to large gravitational stresses, is caused to have a large temperature gradient, the wafer's maximum processing temperature is lower than if no temperature gradients were present.
Substrates in rapid thermal processing chambers may be required to withstand maximum processing temperatures of, for example, 1250.degree. C. If stress is present, this maximum processing temperature is lowered. Thus, to maintain high maximum processing temperatures, it is important to minimize the causes of stress.
It has been modeled that the gravitationally induced stress is equivalent to a center-to-edge radial temperature difference of approximately 3.degree. C. for a 300 mm wafer. However, the impact of the stress on the maximum processing temperature is generally more significant, on the order of fifty to a hundred degrees Celsius.
It is an object of the invention to provide a susceptorless method of supporting substrates that produces less stress in the substrate. It is a further object to provide a substrate support method that causes less wafer slip and less scratching to be produced in the substrate than prior methods.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the claims.